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Preliminary
PLL520-70
CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)
FEATURES
* * * * * * * 45MHz to 90MHz Fundamental Mode Crystal. Output range: 45MHz - 90MHz (no PLL). CMOS outputs. Integrated variable capacitors. Supports 3.3V-Power Supply. Available in die form. Thickness 10 mil.
DIE CONFIGURATION
65 mil (1550,1475)
19 18 17 16 25 26 24 23 22 21 20
27
15
28
14
62 mil
13 29 12
11 30
DESCRIPTIONS
31
10 9 1 2 3 4 5 6 7 8
PLL520-70 is a VCXO IC specifically designed to pull frequency fundamental crystals from 45MHz to 90MHz, with CMOS outputs. Its design was optimized to tolerate higher limits of interelectrodes capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. Its internal varicaps allow an on chip frequency pulling, controlled by the VCON input.
Y X
(0,0)
DIE SPECIFICATIONS
Name Size Reverse side Pad dimensions Thickness Value 62 x 65 mil GND 80 micron x 80 micron 10 mil
BLOCK DIAGRAM
OE
DRIVE_SEL AND OE_CTRL TABLE
VCON Oscillator Amplifier w/ X+ integrated varicaps XQ Pad #19 DRIVE_SEL 0 1 Pad #30 OE_CTRL 0 1 Output Drive High Drive CMOS Standard CMOS (default) State Tri-state Output enabled (default)
PLL520-70
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 8/26/02 Page 1
Preliminary
PLL520-70
CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection
SYMBOL
VDD VI VO TS TA TJ
MIN.
VSS-0.5 VSS-0.5 -65 -40
MAX.
7 VDD+0.5 VDD+0.5 150 85 125 260 2
UNITS
V V V C C C C kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
2. Crystal Specifications PARAMETERS
Built-in Capacitance Inter-electrode capacitance C0/C1 ratio (gamma) Oscillation Frequency
SYMBOL
CX+ CXC0 OF
CONDITIONS
45MHz to 90MHz (VDD=3.3V)
MIN.
TYP.
MAX.
2 2
UNITS
pF
3.6 250 Fund. 45 90 MHz
3. Voltage Control Crystal Oscillator PARAMETERS
VCXO Stabilization Time * VCXO Tuning Range CLK output pullability On-chip Varicaps control range Linearity VCXO Tuning Characteristic VCON input impedance VCON modulation BW 0V VCON 3.3V, -3dB 25
SYMBOL
TVCXOSTB
CONDITIONS
From power valid XTAL C0/C1 < 250 0V VCON 3.3V at room temperature VCON = 0 to 3.3V
MIN.
200*
TYP.
10
MAX.
UNITS
ms ppm
100* 4 - 18* 5* 65 60 10*
ppm pF % ppm/V k kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 8/26/02 Page 2
Preliminary
PLL520-70
CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)
4. General Electrical Specifications PARAMETERS
Supply Current (Loaded Outputs) Operating Voltage Output Clock Duty Cycle Short Circuit Current
SYMBOL
IDD VDD
CONDITIONS
MIN.
3.13
TYP.
MAX.
40 3.47
UNITS
mA V % mA
@ 1.4V
45
50 50
55
5. Jitter specifications PARAMETERS
Period jitter RMS Period jitter peak-to-peak Integrated jitter RMS
*: To be measured
CONDITIONS
77.76MHz 77.76MHz Integrated 12 kHz to 20 MHz at 77.76MHz
MIN.
TYP.
3.5* 24* 0.5*
MAX.
UNITS
ps ps ps
6. Phase noise specifications PARAMETERS
Phase Noise relative to carrier
FREQUENCY
77.76MHz
@10Hz
-75
@100Hz
-95
@1kHz
-125
@10kHz
-145
@100kHz
-155
UNITS
dBc/Hz
Note: Phase Noise at VCON = 0V - to be measured
7. CMOS Output Electrical Specifications PARAMETERS
Output High Voltage Output Low Voltage Output High Voltage at CMOS level Output drive current
SYMBOL
VOH VOL VOHC
CONDITIONS
IOH = -12mA (Standard drive) ILO = 12mA (Standard drive) IOH = -4mA (Standard drive) At TTL level (High drive) At TTL level (Standard drive)
MIN.
2.4
TYP.
MAX.
0.4
UNITS
V V V mA mA
VDD- 0.4 36 12 51 17
8. CMOS Switching Characteristics PARAMETERS
Output Clock Rise/Fall Time (Standard Drive) Output Clock Rise/Fall Time (High Drive)
SYMBOL
CONDITIONS
0.8V ~ 2.0V with 10 pF load 0.3V ~ 3.0V with 15 pF load 0.8V ~ 2.0V with 10 pF load 0.3V ~ 3.0V with 15 pF load
MIN.
TYP.
1.15 3.7 0.5 1.5
MAX.
UNITS
ns
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 8/26/02 Page 3
Preliminary
PLL520-70
CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)
PAD ASSIGNMENT
Pad # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Name Optional GND Optional GND Optional GND Optional GND GND Reserved Optional GNDBUF Optional GNDBUF Not connected Not connected CMOS OUT VDDBUF Optional VDDBUF Not connected Not connected Optional CMOS OUT GNDBUF Reserved DRIVE_SEL Not connected Optional VDD Optional VDD VDD Optional VDD Not connected XIN XOUT Not connected Not connected OE_CTRL VCON X ( m) 248 361 473 587 702 874 1042 1171 1400 1400 1400 1400 1400 1400 1400 1400 1389 1232 1042 854 659 559 459 358 194 109 109 109 109 109 109 Y ( m) 109 109 109 109 109 109 109 109 125 259 476 616 716 871 1089 1227 1365 1365 1365 1365 1365 1365 1365 1365 1365 1223 1017 858 646 397 181
Note: for optimal Phase Noise performance, it is recommended to bond all optional VDD and GND pads.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 8/26/02 Page 4
Preliminary
PLL520-70
CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal)
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991
The order number for this device is a combination of the following: Device number, Package type and Operating temperature range
PART NUMBER
PLL520-70 D C
PART NUMBER TEMPERATURE
C=COMMERCIAL M=MILITARY
I=INDUSTRAL
D=DIE
PACKAGE TYPE
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 8/26/02 Page 5

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